Method and system for user-space storage I/O stack with user-space flash translation layer

ABSTRACT

One embodiment facilitates a user-space storage I/O stack. During operation, the system generates, by a file system in the user-space, a logical block address associated with an I/O request which indicates data to be read or written. The system generates, by a flash translation layer module in the user-space, a physical block address corresponding to the logical block address, wherein the flash translation layer module is located between the file system and a block device driver in the user-space. The system estimates a latency associated with executing the I/O request. In response to determining that the estimated latency is greater than or equal to a predetermined threshold, and that the I/O request is a read request, the system reads the requested data from a location other than the physical block address.

BACKGROUND Field

This disclosure is generally related to the field of data storage. More specifically, this disclosure is related to a method and system for a user-space input/output (I/O) stack with a user-space flash translation layer.

Related Art

The proliferation of the Internet and e-commerce continues to create a vast amount of digital content. Various storage systems and servers have been created to access and store such digital content. A storage system or server can include multiple drives (e.g., a solid state drive (SSD)), and a drive can include non-volatile memory such as NAND flash for persistent storage. Varying designs for SSDs result in different implementations of the local storage I/O stack for NAND flash, including the implementation of the flash translation layer (FTL). The FTL is mainly responsible for mapping logical block addresses (LBAs) to physical block addresses (PBAs). In a conventional device-based FTL device, the FTL is implemented in the hardware (e.g., the SSD) and uses the resources of the SSD controller. In a conventional kernel-based FTL device, the FTL is implemented in the kernel space and uses the resources of the server (e.g., CPU core, memory, etc.). Because an application runs in the user-space, I/O communication from the application through the stack must pass through the kernel space, which can result in a significant context switch expense. Additionally, in an I/O communication with a conventionally implemented FTL, the kernel space context switch may result in a performance bottleneck, especially when compared to the performance of the SSD itself.

One solution is to bypass the kernel space entirely, by implementing the file system and the block device driver in the user-space. The actual writing of the data is divided into two independent stages: first, the user-space file system formats the file into LBAs; and second, the SSD controller maps the LBA to the PBA. However, the application still has no visibility into where the data is stored on the physical media, and when the data is written to the SSD. Thus, the efficiency, performance, and Quality of Service (QoS) of the system can be negatively affected by this solution.

SUMMARY

One embodiment facilitates a user-space storage I/O stack. During operation, the system generates, by a file system in the user-space, a logical block address associated with an I/O request which indicates data to be read or written. The system generates, by a flash translation layer module in the user-space, a physical block address corresponding to the logical block address, wherein the flash translation layer module is located between the file system and a block device driver in the user-space.

In some embodiments, the system estimates a latency associated with executing the I/O request. In response to determining that the estimated latency is greater than or equal to the predetermined threshold: in response to determining that the I/O request is a read request, the system reads the requested data from a location other than the physical block address; and in response to determining that the I/O request is a write request, the system generates, by the flash translation layer module in the user-space, a new physical block address.

In some embodiments, the estimated latency is determined by a latency estimator module, and generating the physical block address causes the latency estimator module to reset the estimated latency.

In some embodiments, in response to determining that the estimated latency is less than the predetermined threshold, the system performs the following operations: in response to determining that the I/O request is a read request, the system reads the requested data from the physical block address and sends the read data to a requesting host; and in response to determining that the I/O request is a write request, the system writes the requested data to the physical block address.

In some embodiments, the system determines the estimated latency by: in response to determining that physical media associated with the physical block address is currently undergoing a program operation and that the program operation is not suspendable, including in the estimated latency a latency associated with completing the program operation; in response to determining that the physical media associated with the physical block address is currently undergoing an erase operation and that the erase operation is not suspendable, including in the estimated latency a latency associated with completing the erase operation; and in response to determining that raw data in a queue is currently undergoing a retry operation, including in the estimated latency a latency associated with completing the retry operation.

In some embodiments, determining the estimated latency is based on a status or condition of physical media associated with the physical block address.

In some embodiments, the system determines whether the estimated latency is greater than or equal to the predetermined threshold by: determining, by an arbitrator module, whether the estimated latency exceeds or is equal to a currently available quota; and in response to determining that the estimated latency does not exceed the currently available quota, the system performs the following operations. The system measures an actual latency associated with completing the I/O request; the system determines actual QoS statistics based on the actual latency; and the system updates the currently available quota by comparing the actual QoS statistics with the predetermined threshold.

In some embodiments, determining that the estimated latency is greater than or equal to the predetermined threshold is in response to determining that the estimated latency exceeds or is equal to the currently available quota.

In some embodiments, in response to determining that the estimated latency does not exceed the currently available quota, the system generates calibrations for subsequent use in determining the estimated latency by comparing the actual latency with the estimated latency, wherein the calibrations are subsequently used by the latency estimator module to determine the estimated latency for another I/O request.

In some embodiments, reading the requested data from a location other than the physical block address is based on a data recovery technique.

BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 illustrates an exemplary environment that facilitates a user-space storage I/O stack, in accordance with an embodiment of the present application.

FIG. 2A illustrates an exemplary environment with a device-based FTL implemented inside an SSD, in accordance with the prior art.

FIG. 2B illustrates an exemplary environment with a kernel-based FTL implemented inside the kernel space, in accordance with the prior art.

FIG. 3 illustrates an exemplary environment with a device-based FTL implemented inside an SSD, including the file system and the block device driver operating in the user-space, in accordance with the prior art.

FIG. 4 illustrates an exemplary environment that facilitates a user-space storage I/O stack, including the file system, FTL, and block device driver implemented inside the user-space, in accordance with an embodiment of the present application.

FIG. 5A presents a flowchart illustrating a method for facilitating a user-space storage I/O stack, in accordance with an embodiment of the present application.

FIG. 5B presents a flowchart illustrating a method for facilitating a user-space storage I/O stack, including estimating a latency associated with an I/O request, in accordance with an embodiment of the present application.

FIG. 6 presents an exemplary architecture for facilitating a user-space storage I/O stack and for facilitating QoS assurance, in accordance with an embodiment of the present application.

FIG. 7 illustrates an exemplary computer system that facilitates a user-space storage I/O stack, in accordance with an embodiment of the present application.

FIG. 8 illustrates an exemplary apparatus that facilitates a user-space storage I/O stack, in accordance with an embodiment of the present application.

In the figures, like reference numerals refer to the same figure elements.

DETAILED DESCRIPTION

The following description is presented to enable any person skilled in the art to make and use the embodiments, and is provided in the context of a particular application and its requirements. Various modifications to the disclosed embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the present disclosure. Thus, the embodiments described herein are not limited to the embodiments shown, but are to be accorded the widest scope consistent with the principles and features disclosed herein.

Overview

The embodiments described herein provide a system which solves the problem of increasing the efficiency of processing I/O requests by implementing the file system, the flash translation layer (FTL), and the block device driver inside the user-space. In a conventional device-based FTL (where the FTL uses the resources of the SSD controller) and a conventional kernel-based FTL (where the FTL uses the resources of the server), an I/O communication from an application can incur the expense of a context switch in the kernel. The kernel space context switch may result in a performance bottleneck.

One solution is to bypass the kernel space entirely, by implementing the file system and the block device driver in the user-space. The actual writing of the data is divided into two independent stages: first, the user-space file system formats the file into LBAs; and second, the SSD controller maps an LBA to a PBA. However, the application still has no visibility into where the data is stored on the physical media, and when the data is written to the SSD. Thus, in such a system, applications without knowledge of the LBA→PBA mapping cannot perform optimizations to improve the efficiency, performance, and lifespan of the system.

The embodiments described herein solve address these inefficiencies by implementing a system which includes the FTL in the user-space, between the file system and the block device driver, as depicted below in relation to FIG. 4. By including the FTL in the user-space, the system provides the application with visibility into the status, condition, and usage of the physical NAND flash. This visibility allows the application to perform optimizations to increase the overall performance and efficiency of the system.

For example, this visibility allows the system to map an LBA to a PBA which optimizes the current scenario (e.g., based on the current status and historical usage of the NAND physical media). The optimization of mapping or assigning a best-fitting PBA can enhance the ability of the NAND itself to serve the front-end application, which can result in an improved QoS (as described below in relation to FIG. 6). Furthermore, the optimization can reduce both the write amplification and the triggers for garbage collection, which can result in a reduced wear-leveling and an increased lifespan of the NAND physical media.

Thus, the embodiments described herein provide a system which improves the performance and efficiency of a storage system, including an improved QoS, a reduced amount of wear-leveling, and an increased lifespan for the physical media. By implementing the FTL in the user-space between the file system and the block device driver, the system provides an application in the user-space with visibility into and control over the communications involved in processing an I/O request, e.g., within the storage I/O stack.

Exemplary Environment and Network

FIG. 1 illustrates an exemplary environment 100 that facilitates a user-space storage I/O stack, in accordance with an embodiment of the present application. Environment 100 can include client servers 102, 104, 106, and 108, which can each be a client computing device or a computing device which interacts with another client device (such as a tablet, a mobile phone, an electronic reader, a laptop computer, a desktop computer, or any other computing device) and an associated user (not shown)). Servers 102-108 can communicate via a data center network/fabric 110 with logical storage buckets 120 (i.e., buckets 122-136). Logical storage buckets 120 can be a part of a cluster of storage servers (not shown), which can be part of a distributed storage system. A storage server can include multiple storage drives, and each drive can include a controller and multiple physical media for data storage.

Environment 100 can also include a multiplexer 140, which takes as input a specific PBA corresponding to an LBA associated with an I/O request. Multiplexer 140 can send the data to one of physical storage drives 150 (i.e., drives 152-168). By implementing the FTL in the user-space (as described below in relation to FIG. 4), the application (e.g., the host) can have visibility into the current conditions of the physical media (e.g., the physical status of the NAND dies). This allows the user-space file system and the user-space FTL to: 1) determine when to begin background operations, which can prevent scheduling background operations at the same time as ongoing host operations and reduce the need to share the I/O bandwidth of a single SSD; 2) assign an incoming write operation to a drive or a channel with a lower load, which can ensure meeting the service-level agreement (SLA) for the write operation; and 3) analyze the estimated latency for an incoming read operation based on the current conditions, which can determine whether the system retrieves the data from another location or from a given PBA.

Exemplary Environments and Challenges in the Prior Art

FIG. 2A illustrates an exemplary environment 200 with a device-based FTL implemented inside an SSD, in accordance with the prior art. Environment 200 can include a user-space 210, a kernel space 220, and a hardware 230. User-space 210 can include an application 212. Kernel space 220 can include a file system 222 and a block device driver 224, which indicates LBAs, such as LBAs 226, 227, and 229. Hardware 230 can be a Peripheral Component Interconnect Express (PCIe) SSD, which includes an FTL 232 and physical media associated with PBAs, such as PBAs 233, 234, and 235. FTL 232 can perform the LBA→PBA mapping.

During operation, application 212 can communicate with file system 222 (via, e.g., a communication 201) and with block device driver 224 (via, e.g., communications 203 and 205). File system 222 can communicate with block device driver 224 (via, e.g., communications 221, 223, and 225). Block device driver 224 can communicate with FTL 232 to process an I/O request. For example, block device driver 224 can generate LBA 227 which is associated with data indicated in the I/O request. Block device driver 224 can send LBA 227 to FTL 232 (via a communication 237). FTL 232 can map LBA 227 to PBA 233, and write the data associated with LBA 227 to the physical media associated with PBA 233. Similarly, block device driver 224 can generate LBA 229, and send LBA 229 to FTL 232 (via a communication 239). FTL 232 can map LBA 229 to PBA 235, and write the data associated with LBA 229 to the physical media associated with PBA 235.

FIG. 2B illustrates an exemplary environment 240 with a kernel-based FTL implemented inside the kernel space, in accordance with the prior art. Environment 240 can include a user-space 250, a kernel space 260, and a hardware 270. User-space 250 can include an application 252. Kernel space 260 can include a file system 262, a block device driver 264, and an FTL 266, which performs the LBA→PBA mapping. Block device driver 264 and FTL 266 can indicate LBAs, such as LBAs 267, 268, and 269. Hardware 270 can be a PCIe SSD, which includes physical media associated with PBAs, such as PBAs 272, 273, and 275.

During operation, application 252 can communicate with file system 262 (via, e.g., a communication 251) and with block device driver 264 and FTL 266 (via, e.g., communications 253 and 255). File system 262 can communicate with block device driver 264 and FTL 266 (via, e.g., communications 261, 263, and 265). Block device driver 264 and FTL 266 can communicate with hardware 270 to process an incoming I/O request. For example, block device driver 224 and FTL 266 can map LBA 267 to PBA 273, and write the data associated with LBA 267 to the physical media associated with PBA 273 (via a communication 281). Similarly, block device driver 264 and FTL 266 can map LBA 269 to PBA 275, and write the data associated with LBA 269 to the physical media associated with PBA 275 (via a communication 283).

Thus, to perform the LBA→PBA mapping, the device-based FTL PCIe SSD (as depicted in FIG. 2A) uses the resources of the SSD controller, while the kernel-based FTL PCIe SSD (as depicted in FIG. 2B) uses the resources of the server (e.g., CPU core and memory). In both of these cases, because the application runs in the user-space, communications (e.g., I/O requests) must pass through the kernel space, which can result in a significant context switch expense. Additionally, in an I/O communication with a conventionally implemented FTL as in FIGS. 2A and 2B, the kernel space context switch may result in a performance bottleneck, especially when compared to the performance of the SSD itself.

FIG. 3 illustrates an exemplary environment 300 with a device-based FTL implemented inside an SSD, including the file system and the block device driver operating in the user-space, in accordance with the prior art. Environment 300 can include a user-space 310, a kernel space 320, and a hardware 330. User-space 310 can include an application 312, a user-space file system 314, and a user-space block device driver 316, which indicates LBAs, such as LBAs 317, 318, and 319. Hardware 330 can include a device-based FTL 332, which performs the LBA→PBA mapping, and can include physical media associated with PBAs, such as PBAs 334, 335, and 337.

During operation, application 312 can communicate with file system 314 (via, e.g., a communication 301) and with user-space block device driver 316 (via, e.g., communications 302 and 303). User-space file system 314 can communicate with user-space block device driver 316 (via, e.g., communications 304, 305, and 306). User-space block device driver 316 can communicate with FTL 232 to process an incoming I/O request. For example, user-space block device driver 316 can generate LBA 317 which is associated with data indicated in the I/O request. User-space block device driver 316 can send LBA 317 to FTL 332 (via a communication 321). FTL 332 can map LBA 317 to PBA 335, and write the data associated with LBA 317 to the physical media associated with PBA 335. Similarly, user-space block device driver 316 can generate LBA 319, and send LBA 319 to FTL 332 (via a communication 322). FTL 332 can map LBA 319 to PBA 337, and write the data associated with LBA 319 to the physical media associated with PBA 337.

Thus, by implementing both the file system and the block device driver in the user-space, the system in FIG. 3 can bypass the kernel space, which may result in a reduced cost for context switching. However, as described above, the actual writing of the data is divided into two independent processes: first, user-space file system 314 formats the file and associated metadata into LBAs using, e.g., the server's CPU core; and second, a microprocessor in the SSD controller (i.e., via FTL 332 of hardware 330) maps the LBAs to the PBAs. As a result, application 312 still has no visibility into where the data is stored on the physical media (i.e., which PBAs of hardware 330), and when the data is written to the physical media. Because these two processes are independent and not visible to the application, the system may not be able to optimize the scheduling and processing of background operations (e.g., garbage collection, logging, and system monitoring) with host operations (e.g., an I/O request that includes these two independent processes). Thus, while bypassing the kernel can provide certain benefits, the system depicted in FIG. 3 cannot perform certain optimizations to improve the efficiency, performance, and lifespan of the system.

Exemplary Environment for Facilitating a User-Space Storage I/O Stack

FIG. 4 illustrates an exemplary environment 400 that facilitates a user-space storage I/O stack, including the file system, FTL, and block device driver implemented inside the user-space, in accordance with an embodiment of the present application. Environment 400 can include a user-space 410, a kernel space 430, and a hardware 440. User-space 410 can include an application 412, a user-space file system 414, a user-space FTL 418, and a user-space block device driver 422. User-space file system 414 can generate LBAs for data associated with an I/O request, and can indicate LBAs, such as LBAs 416 and 417. User-space FTL 418 can perform the LBA→PBA mapping, and can indicate PBAs, such as PBA 420 and 421. User-space block device driver 422 can use a mapped PBA directly for data placement into the physical media associated with the mapped PBA of NAND 442.

During operation, application 412 can communicate with user-space file system 414 (via, e.g., a communication 401) and with user-space FTL 418 (via, e.g., communications 402 and 403). User-space file system 414 can communicate with user-space FTL 418 (via, e.g., communications 404 and 405). User-space FTL 418 can communicate with user-space block device driver 422 (via, e.g., communications 407, 408, and 409) to process an incoming I/O request. For example, user-space file system 414 can generate LBA 417 which is associated with data indicated in the I/O request. User-space file system 414 can send LBA 417 to user-space FTL 418 (via a communication 406). User-space FTL 418 can map LBA 417 to, e.g., PBA 421, and notify user-space block device driver 422 of the mapped PBA 421 (via, e.g., one of communications 407, 408, and 409). User-space block device driver 422 can thus operate the mapped PBA 421 to directly place the data associated with LBA 417 to the physical media associated with PBA 421 (e.g., via a communication 431, which bypasses kernel space 430).

Note that an SSD can carry out both the host operations (e.g., read, write, and erase operations) and the background operations (e.g., data refreshing, garbage collection, and bad block management). In a conventional system, the FTL issues or initiates the background operations. As a result, in the conventional system, host operations and background operations which occur simultaneously may share the I/O bandwidth of one physical SSD, which can decrease the overall performance of the system.

The embodiments described herein solve this problem by placing the FTL in the user-space between the user-space file system and the user-space block device driver. This provides the host with visibility into the current status and historical usage of the PBA, which allows the user-space FTL to optimize the LBA→PBA mapping.

The user-space FTL can also optimize the scheduling of the background operations. On an incoming write operation, the system can determine that a certain drive or channel is busy, and subsequently assign the write operation to a drive or a channel with a lower load. This can ensure that the write operation meets the required SLA (e.g., does not exceed a predetermined threshold or a currently available quote). On an incoming read operation, the user-space FTL can analyze the estimated latency for the incoming read operation based on the “big picture” (e.g., the status or condition of the physical media). Based on the estimated latency, the user-space FTL can either determine to retrieve the requested data to be read from a different location or determine to read the data from the given PBA. Processing an incoming I/O request is described below in relation to FIG. 5A, and estimating a latency associated with an I/O request is described below in relation to FIG. 5B.

Method for Facilitating a User-Space Storage I/O Stack

FIG. 5A presents a flowchart 500 illustrating a method for facilitating a user-space storage I/O stack, in accordance with an embodiment of the present application. During operation, the system receives an I/O request which indicates data to be read from or written to a non-volatile memory (operation 502). The system generates, by a file system in the user-space, logical block addresses associated with the I/O request (operation 504). The system generates, by a flash translation layer module in the user-space, a physical block address for each logical block address (operation 506). The flash translation layer module is located between the file system and a block device driver in the user-space, as described above in relation to FIG. 4. The system estimates a latency associated with executing the I/O request (operation 508). The system determines whether the estimated latency is greater than or equal to a predetermined threshold (decision 510). If the estimated latency is greater than or equal to the predetermined threshold (decision 510), and if the operation is a write operation (decision 512), the system generates, by the FTL module, a new physical block address for a respective LBA (operation 514), and the operation continues as described above at operation 508. If the estimated latency is greater than or equal to the predetermined threshold (decision 510), and the operation is a read operation (decision 512), the system reads the requested data from a location other than the physical block address (operation 516).

If the estimated latency is less than the predetermined threshold (decision 510), and if the operation is a read operation (decision 522), the system reads the requested data from the PBA, and sends the read data to a requesting host (operation 524). If the estimated latency is less than the predetermined threshold (decision 510), and if the operation is a write operation (decision 522), the system writes the requested data to the PBA (operation 526).

FIG. 5B presents a flowchart 520 illustrating a method for facilitating a user-space storage I/O stack, including estimating a latency associated with an I/O request, in accordance with an embodiment of the present application. Flowchart 520 can correspond to operation 508 of FIG. 5A. During operation, the system determines whether a physical media (e.g., a die) associated with the PBA is currently being programmed (decision 532). If it is, and if the program operation is not suspendable (decision 534), the system includes, by a latency estimator module, in the estimated latency a latency associated with completing the program operation (operation 536). If the die is not currently being programmed (decision 532), or if the die is current being programmed and the program operation is suspendable (decisions 532 and 534), the operation continues at decision 538.

The system determines whether the physical media (e.g., the die) associated with the PBA is currently being erased (decision 538). If it is, and if the erase operation is not suspendable (decision 540), the system includes, by the latency estimator module, in the estimated latency a latency associated with completing the erase operation (operation 542). If the die is not currently being erased (decision 538), or if the die is current being erased and the erase operation is suspendable (decisions 538 and 540), the operation continues at decision 544.

The system determines whether data in a queue of the controller is currently being retried (decision 544). If it is, the system includes, by the latency estimator module, in the estimated latency a latency associated with retrying the data in the queue (operation 546). If there is no data in a queue currently being retried (decision 544), the operation returns.

Exemplary Architecture for Facilitating a User-Space Storage I/O Stack

FIG. 6 presents an exemplary architecture 600 for facilitating a user-space storage I/O stack and for facilitating QoS assurance, in accordance with an embodiment of the present application. Architecture 600 can include a latency estimator module 602, an arbitrator module 604, a latency meter module 606, a QoS statistics module 608, a quota analysis module 610, and an estimation calibrator module 612. During operation, latency estimator module 602 can receive a request 622, and generate an estimated latency 624 associated with executing the request (as described above in relation to FIG. 5B). Latency estimator module 602 can send estimated latency 624 to both arbitrator module 604 and estimation calibrator module 612. Arbitrator module 604 can determine whether estimated latency 624 exceeds a currently available quota 636, which is received and obtained from quota analysis module 610. If estimated latency 624 exceeds currently available quota 636, arbitrator module 604 can send a message 626 back to the host (via latency estimator module 602). This allows the host to take an action based on whether the I/O (e.g., request 622) request is a read or a write. If the I/O request is a read request, the host can read the requested data from a location other than the PBA, e.g., based on a data recovery technique (as in operation 516 of FIG. 5A). If the I/O request is a write request, the FTL module in the user-space can generate a new PBA, which sends another request (e.g., request 622) into the latency estimate module 602 for another iteration of processing (as in operation 514 of FIG. 5A).

If estimated latency 624 does not exceed currently available quota 636, arbitrator module 604 can issue the I/O request to the assigned PBA, and can further send a message 628 to latency meter module 606, which causes latency meter module 606 to measure an actual latency 630 associated with completing the I/O request. Latency meter module 606 can send actual latency 630 to both estimation calibrator module 612 and QoS statistics module 608.

QoS statistics module can generate actual QoS statistics 632 based on actual latency 630, and send actual QoS statistics 632 to quota analysis module 610. Quota analysis module 610 can compare actual QoS statistics 632 with a predetermined threshold 634 (e.g., QoS requirements as indicated in an SLA), and update a currently available quota 636 based on the comparison. Quota analysis module 610 can send the updated currently available quota 636 to arbitrator module 604 for use in a subsequent determination of whether the estimated latency exceeds the currently available quota.

Estimation calibrator module 612 can receive as input both estimated latency 624 and actual latency 630, and generate calibrations 642. Estimation calibrator module 612 can then send generated calibrations 642 to latency estimator module 602 for use in a subsequent determination of the estimated latency for another I/O request. That is, generated calibrations 642 can indicate modifications that latency estimator module 602 can make to tune a latency estimation operation which is to be performed at a later time by latency estimator module 602.

Note that architecture 600 depicts a closed loop system, which includes feedback loops between output and input elements. For example, one feedback loop exists between latency estimator 602 and estimation calibrator module 612. Another feedback loop exists between latency estimator module 602, arbitrator module 604, latency meter module 606, and estimation calibrator module 612. Yet another feedback loop exists between arbitrator module 604, latency meter module 606, QoS statistics module 608, and quota analysis module 610.

Exemplary Computer System and Apparatus

FIG. 7 illustrates an exemplary computer system 700 that facilitates a user-space storage I/O stack, in accordance with an embodiment of the present application. Computer system 700 includes a processor 702, a memory 704, and a storage device 708. Computer system 700 may be a computing device or a storage device. Memory 704 can include a volatile memory (e.g., RAM) that serves as a managed memory, and can be used to store one or more memory pools. Furthermore, computer system 700 can be coupled to a display device 710, a keyboard 712, and a pointing device 714. Storage device 708 can store an operating system 716, a content-processing system 718, and data 734.

Content-processing system 718 can include instructions, which when executed by computer system 700, can cause computer system 700 to perform methods and/or processes described in this disclosure. For example, content-processing system 718 can include instructions for receiving and transmitting data packets, including a request to write or read data, data to be encoded and stored, or a block or a page of data.

Content-processing system 718 can further include instructions for generating, by a file system in the user-space, a logical block address associated with an I/O request which indicates data to be read or written (LB A-managing module 722). Content-processing system 718 can include instructions for generating, by a flash translation layer module in the user-space, a physical block address corresponding to the logical block address (PBA-managing module 724). Content-processing system 718 can include instructions for estimating a latency associated with executing the I/O request (latency-estimating module 726). Content-processing system 718 can include instructions for, in response to determining that the estimated latency is greater than or equal to a predetermined threshold (arbitrating module 728), and that the I/O request is a read request (arbitrating module 728), reading the requested data from a location other than the physical block address (data-reading module 730).

Content-processing system 718 can include instructions for, in response to determining that the estimated latency is less than the predetermined threshold (arbitrating module 728), and in response to determining that the I/O request is a read request (arbitrating module 728): reading the requested data from the physical block address (data-reading module 730), and sending the read data to a requesting host (communication module 720). Content-processing system 718 can include instructions for, in response to determining that the estimated latency is less than the predetermined threshold (arbitrating module 728), and in response to determining that the I/O request is a write request (arbitrating module 728), writing the requested data to the physical block address (data-writing module 732).

Data 734 can include any data that is required as input or that is generated as output by the methods and/or processes described in this disclosure. Specifically, data 734 can store at least: data to be stored, written, retrieved, or copied; a block of data; a request; an I/O request which indicates data to be read or written; a logical block address (LBA); a physical block address (PBA); a latency; an estimated latency associated with executing an I/O request; an actual latency associated with completing an I/O request; a predetermined threshold; an indicator of physical media associated with a PBA; a status or condition of physical media; raw data; a queue; a program operation; an erase operation; a retry operation; a quota; a currently available quota; a calibration; and a data recovery technique.

FIG. 8 illustrates an exemplary apparatus 800 that facilitates a user-space storage I/O stack, in accordance with an embodiment of the present application. Apparatus 800 can comprise a plurality of units or apparatuses which may communicate with one another via a wired, wireless, quantum light, or electrical communication channel. Apparatus 800 may be realized using one or more integrated circuits, and may include fewer or more units or apparatuses than those shown in FIG. 8. Further, apparatus 800 may be integrated in a computer system, or realized as a separate device which is capable of communicating with other computer systems and/or devices. Specifically, apparatus 800 can comprise units 802-814 which perform functions or operations similar to modules 720-732 of computer system 700 of FIG. 7, including: a communication unit 802; an LBA-managing unit 804; a PBA-managing unit 806; a latency-estimating unit 808; an arbitrating unit 810; a data-reading unit 812; and a data-writing unit 814.

The data structures and code described in this detailed description are typically stored on a computer-readable storage medium, which may be any device or medium that can store code and/or data for use by a computer system. The computer-readable storage medium includes, but is not limited to, volatile memory, non-volatile memory, magnetic and optical storage devices such as disk drives, magnetic tape, CDs (compact discs), DVDs (digital versatile discs or digital video discs), or other media capable of storing computer-readable media now known or later developed.

The methods and processes described in the detailed description section can be embodied as code and/or data, which can be stored in a computer-readable storage medium as described above. When a computer system reads and executes the code and/or data stored on the computer-readable storage medium, the computer system performs the methods and processes embodied as data structures and code and stored within the computer-readable storage medium.

Furthermore, the methods and processes described above can be included in hardware modules. For example, the hardware modules can include, but are not limited to, application-specific integrated circuit (ASIC) chips, field-programmable gate arrays (FPGAs), and other programmable-logic devices now known or later developed. When the hardware modules are activated, the hardware modules perform the methods and processes included within the hardware modules.

The foregoing embodiments described herein have been presented for purposes of illustration and description only. They are not intended to be exhaustive or to limit the embodiments described herein to the forms disclosed. Accordingly, many modifications and variations will be apparent to practitioners skilled in the art. Additionally, the above disclosure is not intended to limit the embodiments described herein. The scope of the embodiments described herein is defined by the appended claims. 

What is claimed is:
 1. A computer system for facilitating a user-space storage I/O stack, the system comprising: a processor; and a memory coupled to the processor and storing instructions, which when executed by the processor cause the processor to perform a method, the method comprising: generating, by a file system in the user-space, a logical block address associated with an I/O request which indicates data to be read or written; receiving, by a flash translation layer module in the user-space from the file system, the logical block address, wherein the flash translation layer module operates by communicating with the file system and a block device driver in the user-space; mapping, by the flash translation layer module in the user-space, a physical block address corresponding to the logical block address; notifying the block device driver in the user-space of the physical block address; and operating, by the block device driver in the user-space, the mapped physical block address to access or place the data in a non-volatile memory by bypassing a kernel space.
 2. The computer system of claim 1, wherein the method further comprises: estimating a latency associated with executing the I/O request; in response to determining that the estimated latency is greater than or equal to the predetermined threshold: in response to determining that the I/O request is a read request, reading the requested data from a location other than the physical block address; and in response to determining that the request is a write request, generating, by the flash translation layer module in the user-space, a new physical block address.
 3. The computer system of claim 2, wherein the estimated latency is determined by a latency estimator module, and wherein generating the physical block address causes the latency estimator module to reset the estimated latency.
 4. The computer system of claim 2, wherein in response to determining that the estimated latency is less than the predetermined threshold, the method further comprises: in response to determining that the I/O request is a read request: reading the requested data from the physical block address; and sending the read data to a requesting host; and in response to determining that the I/O request is a write request: writing the requested data to the physical block address.
 5. The computer system of claim 2, wherein determining the estimated latency comprises: in response to determining that physical media associated with the physical block address is currently undergoing a program operation and that the program operation is not suspendable, including in the estimated latency a latency associated with completing the program operation; in response to determining that the physical media associated with the physical block address is currently undergoing an erase operation and that the erase operation is not suspendable, including in the estimated latency a latency associated with completing the erase operation; and in response to determining that raw data in a queue is currently undergoing a retry operation, including in the estimated latency a latency associated with completing the retry operation.
 6. The computer system of claim 2, wherein determining the estimated latency is based on a status or condition of physical media associated with the physical block address.
 7. The computer system of claim 2, wherein determining whether the estimated latency is greater than or equal to the predetermined threshold comprises: determining, by an arbitrator module, whether the estimated latency exceeds or is equal to a currently available quota; and in response to determining that the estimated latency does not exceed the currently available quota: measuring an actual latency associated with completing the I/O request; determining actual QoS statistics based on the actual latency; and updating the currently available quota by comparing the actual QoS statistics with the predetermined threshold.
 8. The computer system of claim 7, wherein determining that the estimated latency is greater than or equal to the predetermined threshold is in response to determining that the estimated latency exceeds or is equal to the currently available quota.
 9. The computer system of claim 7, wherein in response to determining that the estimated latency does not exceed the currently available quota, the method further comprises: generating calibrations for subsequent use in determining the estimated latency by comparing the actual latency with the estimated latency, wherein the calibrations are subsequently used by the latency estimator module to determine the estimated latency for another I/O request.
 10. The computer system of claim 2, wherein reading the requested data from a location other than the physical block address is based on a data recovery technique.
 11. A computer-implemented method for facilitating a user-space storage I/O stack, the method comprising: generating, by a file system in the user-space, a logical block address associated with an I/O request which indicates data to be read or written; receiving, by a flash translation layer module in the user-space from the file system, the logical block address, wherein the flash translation layer module operates by communicating with the file system and a block device driver in the user-space; mapping, by the flash translation layer module in the user-space, a physical block address corresponding to the logical block address; notifying the block device driver in the user-space of the physical block address; and operating, by the block device driver in the user-space, the mapped physical block address to access or place the data in a non-volatile memory by bypassing a kernel space.
 12. The method of claim 11, further comprising: estimating a latency associated with executing the I/O request; in response to determining that the estimated latency is greater than or equal to the predetermined threshold: in response to determining that the I/O request is a read request, reading the requested data from a location other than the physical block address; and in response to determining that the request is a write request, generating, by the flash translation layer module in the user-space, a new physical block address.
 13. The method of claim 12, wherein the estimated latency is determined by a latency estimator module, and wherein generating the physical block address causes the latency estimator module to reset the estimated latency.
 14. The method of claim 12, wherein in response to determining that the estimated latency is less than the predetermined threshold, the method further comprises: in response to determining that the I/O request is a read request: reading the requested data from the physical block address; and sending the read data to a requesting host; and in response to determining that the I/O request is a write request: writing the requested data to the physical block address.
 15. The method of claim 12, wherein determining the estimated latency comprises: in response to determining that physical media associated with the physical block address is currently undergoing a program operation and that the program operation is not suspendable, including in the estimated latency a latency associated with completing the program operation; in response to determining that the physical media associated with the physical block address is currently undergoing an erase operation and that the erase operation is not suspendable, including in the estimated latency a latency associated with completing the erase operation; and in response to determining that raw data in a queue is currently undergoing a retry operation, including in the estimated latency a latency associated with completing the retry operation.
 16. The method of claim 12, wherein determining the estimated latency is based on a status or condition of physical media associated with the physical block address.
 17. The method of claim 12, wherein determining whether the estimated latency is greater than or equal to the predetermined threshold comprises: determining, by an arbitrator module, whether the estimated latency exceeds or is equal to a currently available quota; and in response to determining that the estimated latency does not exceed the currently available quota: measuring an actual latency associated with completing the I/O request; determining actual QoS statistics based on the actual latency; and updating the currently available quota by comparing the actual QoS statistics with the predetermined threshold.
 18. The method of claim 17, wherein determining that the estimated latency is greater than or equal to the predetermined threshold is in response to determining that the estimated latency exceeds or is equal to the currently available quota.
 19. The method of claim 17, wherein in response to determining that the estimated latency does not exceed the currently available quota, the method further comprises: generating calibrations for subsequent use in determining the estimated latency by comparing the actual latency with the estimated latency, wherein the calibrations are subsequently used by the latency estimator module to determine the estimated latency for another I/O request.
 20. The method of claim 12, wherein reading the requested data from a location other than the physical block address is based on a data recovery technique. 